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	~~<!--'''Intel 8086'''-->~~[[Datoteka:I8086.jpg\|mini\|300px\|Intel 8086 procesor]]		[[Datoteka:I8086.jpg\|mini\|300px\|Intel 8086 procesor]]

	'''Intel 8086''' ime je za 16-[[bit]]ni [[mikroprocesor]] kojeg je razvila [[SAD\|američka]] [[tvrtka]] [[Intel]] [[1976.]] godine, ovaj mikroprocesor je temelj standarnom industrijskom mikroprocesoru [[x86]]. Slabija inačica [[Intel 8088]] s 8-bitnom vanjskom podatkovnom [[sabirnica\|sabirnicom]] korišten je za prvo [[IBM]] [[PC]] računalo. Razlog zašto je 8088 korišten za prvi PC bili su jeftiniji i dostupniji 8-bitni memorijski čipovi.		'''Intel 8086''' ime je za 16-[[bit]]ni [[mikroprocesor]] kojeg je razvila [[SAD\|američka]] [[tvrtka]] [[Intel]] [[1976.]] godine, ovaj mikroprocesor je temelj standarnom industrijskom mikroprocesoru [[x86]]. Slabija inačica [[Intel 8088]] s 8-bitnom vanjskom podatkovnom [[sabirnica\|sabirnicom]] korišten je za prvo [[IBM]] [[PC]] računalo. Razlog zašto je 8088 korišten za prvi PC bili su jeftiniji i dostupniji 8-bitni memorijski čipovi.

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[[Datoteka:I8086.jpg|mini|300px|Intel 8086 procesor]]

'''Intel 8086''' ime je za 16-[[bit]]ni [[mikroprocesor]] kojeg je razvila [[SAD|američka]] [[tvrtka]] [[Intel]] [[1976.]] godine, ovaj mikroprocesor je temelj standarnom industrijskom mikroprocesoru [[x86]]. Slabija inačica [[Intel 8088]] s 8-bitnom vanjskom podatkovnom [[sabirnica|sabirnicom]] korišten je za prvo [[IBM]] [[PC]] računalo. Razlog zašto je 8088 korišten za prvi PC bili su jeftiniji i dostupniji 8-bitni memorijski čipovi.

== Tehnički podaci ==

* Takt: 4,77 do 10 MHZ
* Broj tranzistora: 29.000
* Tehnologija: NMOS, CMOS, HMOS
* Kućište: [[Dual in-line package|DIP]] 40 iglica
* Adresna sabirnica: 20-bita (1MB)
* Podatkovna sabirnica: 16-bita
* Broj naredbi: 117

{{prijevod-eng}}
== Popis strojnih naredbi 8086 procesora ==

{| class="wikitable"
! Instruction !! Meaning !! Notes
|-
| [[Intel BCD opcodes|AAA]] || '''A'''SCII '''a'''djust AL after '''a'''ddition || used with unpacked [[binary coded decimal]]
|-
| [[Intel BCD opcodes|AAD]] || '''A'''SCII '''a'''djust AX before '''d'''ivision || buggy in the original instruction set, but "fixed" in the NEC V20, causing a number of incompatibilites
|-
| [[Intel BCD opcodes|AAM]] || '''A'''SCII '''a'''djust AX after '''m'''ultiplication ||
|-
| [[Intel BCD opcodes|AAS]] || '''A'''SCII '''a'''djust AL after '''s'''ubtraction ||
|-
| ADC || '''Ad'''d with '''c'''arry ||
|-
| ADD || Add ||
|-
| AND || Logical AND ||
|-
| CALL || Call procedure ||
|-
| CBW || '''C'''onvert '''b'''yte to '''w'''ord ||
|-
| CLC || '''Cl'''ear '''c'''arry flag ||
|-
| CLD || '''Cl'''ear '''d'''irection flag ||
|-
| [[CLI (x86 instruction)|CLI]] || '''Cl'''ear '''i'''nterrupt flag ||
|-
| CMC || '''C'''o'''m'''plement '''c'''arry flag ||
|-
| CMP || '''C'''o'''mp'''are operands ||
|-
| CMPSB || '''C'''o'''mp'''are bytes in memory ||
|-
| CMPSW || '''C'''o'''mp'''are words ||
|-
| CWD || '''C'''onvert '''w'''ord to '''d'''oubleword ||
|-
| [[Intel BCD opcodes|DAA]] || '''D'''ecimal '''a'''djust AL after '''a'''ddition || (used with packed [[binary coded decimal]])
|-
| [[Intel BCD opcodes|DAS]] || '''D'''ecimal '''a'''djust AL after '''s'''ubtraction ||
|-
| DEC || '''Dec'''rement by 1 ||
|-
| DIV || Unsigned '''div'''ide ||
|-
| ESC || Used with [[floating-point unit]] ||
|-
| [[HLT]] || Enter '''h'''a'''lt''' state ||
|-
| IDIV || S'''i'''gned '''div'''ide ||
|-
| IMUL || S'''i'''gned '''mul'''tiply ||
|-
| IN || '''In'''put from port ||
|-
| INC || '''Inc'''rement by 1 ||
|-
| [[INT (x86 instruction)|INT]] || Call to '''int'''errupt ||
|-
| INTO || Call to '''int'''errupt if '''o'''verflow ||
|-
| IRET || '''Ret'''urn from '''i'''nterrupt ||
|-
| Jxx || '''J'''ump if condition || (''JA, JAE, JB, JBE, JC, JCXZ, JE, JG, JGE, JL, JLE, JNA, JNAE, JNB, JNBE, JNC, JNE, JNG, JNGE, JNL, JNLE, JNO, JNP, JNS, JNZ, JO, JP, JPE, JPO, JS, JZ'')
|-
| [[JMP (x86 instruction)|JMP]] || '''J'''u'''mp''' ||
|-
| LAHF || '''L'''oad '''f'''lags into '''AH''' register ||
|-
| LDS || '''L'''oad pointer using '''DS''' ||
|-
| LEA || '''L'''oad '''E'''ffective '''A'''ddress ||
|-
| LES || '''L'''oad '''ES''' with pointer ||
|-
| LOCK || Assert BUS '''LOCK'''# signal || (for multiprocessing)
|-
| LODSB || '''Lo'''a'''d''' '''b'''yte ||
|-
| LODSW || '''Lo'''a'''d''' '''w'''ord ||
|-
| LOOP/LOOPx || '''Loop''' control || (''LOOPE, LOOPNE, LOOPNZ, LOOPZ'')
|-
| [[MOV (x86 instruction)|MOV]] || '''Mov'''e
|-
| MOVSB || '''Mov'''e '''b'''yte from '''s'''tring to string ||
|-
| MOVSW || '''Mov'''e word from '''s'''tring to '''s'''tring ||
|-
| MUL || Unsigned '''mul'''tiply ||
|-
| NEG || Two's complement '''neg'''ation ||
|-
| [[NOP]] || '''N'''o '''op'''eration ||
|-
| NOT || Negate the operand, logical '''NOT''' ||
|-
| OR || Logical '''OR''' ||
|-
| OUT || '''Out'''put to port ||
|-
| POP || '''Pop''' data from stack ||
|-
| POPF || '''Pop''' data into '''f'''lags register ||
|-
| PUSH || '''Push''' data onto stack ||
|-
| PUSHF || '''Push f'''lags onto stack ||
|-
| RCL || '''R'''otate '''l'''eft (with '''c'''arry) ||
|-
| RCR || '''R'''otate '''r'''ight (with '''c'''arry) ||
|-
| REPxx || '''Rep'''eat CMPS/MOVS/SCAS/STOS || (''REP, REPE, REPNE, REPNZ, REPZ'')
|-
| RET || '''Ret'''urn from procedure ||
|-
| RETN || '''Ret'''urn from '''n'''ear procedure ||
|-
| RETF || '''Ret'''urn from '''f'''ar procedure ||
|-
| ROL || '''Ro'''tate '''l'''eft ||
|-
| ROR || '''Rot'''ate '''r'''ight ||
|-
| SAHF || '''S'''tore '''AH''' into '''f'''lags ||
|-
| SAL || '''S'''hift '''A'''rithmetically '''l'''eft (multiply) ||
|-
| SAR ||''' S'''hift '''A'''rithmetically '''r'''ight (signed divide) ||
|-
| SBB || '''S'''u'''b'''traction with '''b'''orrow ||
|-
| SCASB || '''C'''omp'''a'''re '''b'''yte '''s'''tring ||
|-
| SCASW || '''C'''omp'''a'''re '''w'''ord '''s'''tring ||
|-
| SHL || '''Sh'''ift '''l'''eft (multiply) ||
|-
| SHR || '''Sh'''ift '''r'''ight (unsigned divide) ||
|-
| STC || '''S'''e'''t''' '''c'''arry flag ||
|-
| STD || '''S'''e'''t''' '''d'''irection flag ||
|-
| [[STI (x86 instruction)|STI]] || '''S'''e'''t''' '''i'''nterrupt flag ||
|-
| STOSB || '''Sto'''re '''b'''yte in '''s'''tring ||
|-
| STOSW || '''Sto'''re '''w'''ord in '''s'''tring ||
|-
| SUB || '''Sub'''traction ||
|-
| TEST || Logical compare (AND) ||
|-
| WAIT || '''Wait''' until not busy || Waits until BUSY# pin is inactive (used with [[floating-point unit]])
|-
| XCHG || E'''xch'''an'''g'''e data ||
|-
| XLAT || Table look-up translation ||
|-
| XOR || E'''x'''clusive '''OR''' ||
|}

[[Kategorija:Intelovi procesori]]

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